Remember the stretch when you couldn’t buy a decent GPU without refreshing a retailer page like a maniac? Miners took the consumer cards first, then model training took the datacenter ones. Both times the story got told as a demand story. Everyone wanted the same silicon at the same time, prices went sideways, and the rest of us waited.
The current squeeze is different, and it’s more interesting if you build things for a living. It isn’t about who wants the chips. It’s about a rectangle.
What a $400 million machine can’t do
ASML’s High NA EUV systems run about $400 million apiece. They are the most precise manufacturing tools humans have ever built, and they have a limitation that sounds almost mundane: they cannot print the largest chip designs in a single exposure. The printable field is smaller than what the biggest AI accelerator designs actually need.
So the workaround is to break the design up and print it in multiple steps, then align those pieces to each other with atomic-scale accuracy. That’s more passes, more alignment error budget, more yield risk, and more cost per finished die. Every one of those steps is a place where a wafer can go from valuable to scrap.
ASML has a fix in the plan. It arrives somewhere in 2031 to 2033. That is not a typo and it is not a rounding error on a roadmap. It’s most of a decade.
Why AI chips make it worse instead of better
Here’s the uncomfortable feedback loop. The chips that matter most for training and serving large models are exactly the chips that keep growing. Bigger dies mean more compute and more on-package memory bandwidth, which is what model training rewards. So designers push the die outward until it hits the edge of what the tool can print, and then past it.
Every generation of accelerator that gets physically larger pushes further into the multi-step regime. The demand curve and the physics curve are moving in opposite directions. AI silicon isn’t just consuming capacity, it’s consuming the most expensive and lowest-yielding kind of capacity.
Meanwhile the supply side has ceilings that money doesn’t immediately move. ASML’s near-term output is limited by physics and clean-room space. Full-year 2026 plans call for roughly 65 Low NA EUV systems and about 130 DUV immersion systems, with a planned 30% capacity increase. ASML CFO Roger Dassen told Reuters that the company’s existing EUV machines, which run around $200 million each, are effectively sold out through 2027.
Confidence in the newer tools is real. On 8 September 2026, ASML said Samsung Electronics and TSMC had committed to using High NA EUV systems in high-volume production, and Intel has signed on as well. Committing to the tool doesn’t shrink the multi-step problem, though. It just means the biggest fabs are willing to pay the tax.
What this means if you ship bots
I build agents and automation for a living. I don’t buy lithography machines. But this stuff lands on my invoice, and probably yours, in a few specific ways.
- Frontier inference stays expensive longer than you’d guess. If you’ve been budgeting on the assumption that per-token costs fall on a smooth curve forever, build a scenario where they flatten out for a while.
- Capacity is lumpy, not linear. Sold-out tooling through 2027 means new fab output arrives in steps tied to clean-room builds. Plan for periods where the model you want has a queue.
- Model choice is an architecture decision, not a config value. If your agent hard-codes one frontier model, a supply crunch or a price change becomes an outage. Route through an abstraction layer so swapping providers is a config change and a test run.
- Small models get more attractive by default. Not because they’re better, but because the economics of the very largest silicon are structurally difficult for years. Distilled and quantized models running on hardware you can actually get are a solid hedge.
The practical takeaway
The thing I keep coming back to is the timeline mismatch. Software people are used to shipping a fix in a sprint. A lithography fix is a decade-long program involving optics, materials, and buildings that don’t exist yet. When the physical layer under your stack moves on that clock and your product moves on a two-week clock, you don’t get to wait for the hardware to solve your problem.
So design like the constraint is permanent. Measure what your agents actually cost per task, not per token. Cache aggressively. Use the biggest model for the step that genuinely needs it and something cheaper for everything else. Keep a working fallback path tested, not theoretical.
None of that is glamorous. But building around a hard limit instead of hoping it disappears is the difference between a system that survives a price shock and one that gets an incident report written about it. The rectangle isn’t changing size until the 2030s. Your architecture can change this week.
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